D.2.4 DDRGP — Port GP Data Direction Register
PORTGP — Port GP Data Register
$YFF906
$YFF907
15
8
7
0
DDRGP
0
PORTGP
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
When GPT pins are used as an 8-bit port, DDRGP determines whether pins are input
or output and PORTGP holds the 8-bit data.
DDRGP[7:0] — Parallel Data Direction Register
0 = Input only
1 = Output
PORTGP[7:0] — Parallel Data Register
D.2.5 OC1M— OC1 Action Mask Register
OC1D — OC1 Action Data Register
$YFF908
$YFF909
D
15
11
10
0
9
0
8
0
7
0
3
0
2
0
1
0
0
0
OC1M
0
OC1D
0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that
determines which pins are affected. OC1D determines what outputs are affected.
OC1M[5:1] — OC1 Mask
0 = Corresponding output compare pin is not affected by OC1 compare.
1 = Corresponding output compare pin is affected by OC1 compare.
OC1M[5:1] correspond to OC[5:1].
OC1D[5:1] — OC1 Data
0 =If OC1 mask bit is set, clear corresponding output compare pin on OC1 match.
1 =If OC1 mask bit is set, set corresponding output compare pin on OC1 match.
OC1D[5:1] correspond to OC[5:1].
D.2.6 TCNT — Timer Counter Register
$YFF90A
TCNT is the 16-bit free-running counter associated with the input capture, output com-
pare, and pulse accumulator functions of the GPT module.
MOTOROLA
D-6
REGISTER SUMMARY
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
