Table D-14 PQSPAR Pin Assignments
PQSPAR Field
PQSPAR Bit
Pin Function
PQSPA0
PQSPA1
PQSPA2
PQSPA3
PQSPA4
PQSPA5
PQSPA6
PQSPA7
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PQS0
MISO
PQS1
MOSI
1
PQS2
SCK
PQS3
PCS0/SS
PQS4
PCS1
PQS5
PCS2
PQS6
PCS3
2
PQS7
TXD
1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE in SPCR1 set), in which case
it becomes SPI serial clock SCK.
2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE in SCCR1 = 1), in
which case it becomes SCI serial output TXD.
D
DDRQS determines whether pins are inputs or outputs. Clearing a bit makes the cor-
responding pin an input; setting a bit makes the pin an output. DDRQS affects both
QSPI function and I/O function.
Table D-15 Effect of DDRQS on PORTQS Pins
Pin
DDRQS Bit
Pin Function
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
Digital Input
Digital Output
PQS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PQS1
PQS2
PQS2
PQS3
PQS4
PQS5
PQS6
PQS7
MC68331
REGISTER SUMMARY
MOTOROLA
D-31
USER’S MANUAL