RECEIVER 2ND L.O.
30.720 MHz
REF. OSC.
15.360 MHz
NO CONNECTS
(ON–CHIP OSC.
OPTIONAL)
RECEIVER FIRST L.O.
825.030 844.980 MHz
X2
“1”
“1”
“1”
LOCK DETECT SIGNAL
R2
→
C
(30 kHz STEPS)
OSC
RA2
RA1
RA0
LD
R1
R1
out
φ
–
+
R
OSC
in
X4
NOTE 6
VCO
φ
V
MC145152–2
NOTE 5
NOTE 7
V
V
+ V
DD
R2
C
MC
SS
f
X4
NOTE 6
TRANSMITTER
MODULATION
in
N9
N0 A5
A0
MC12017
TRANSMITTER SIGNAL
825.030 844.980 MHz
(30 kHz STEPS)
÷
64/65 PRESCALER
NOTE 6
CHANNEL PROGRAMMING
→
NOTES:
1. Receiver 1st I.F. = 45 MHz, low side injection; Receiver 2nd I.F. = 11.7 MHz, low side injection.
2. Duplex operation with 45 MHz receiver/transmit separation.
3. f = 7.5 kHz; ÷ R = 2048.
R
4. N
= N 64 + A = 27501 to 28166; N = 429 to 440; A = 0 to 63.
total
5. MC145158–2 may be used where serial data entry is desired.
6. High frequency prescalers (e.g., MC12018 [520 MHz] and MC12022 [1 GHz]) may be used for higher frequency VCO and f
implementations.
ref
7. The φ and φ outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter Design page for
R
V
additionalinformation. The φ and φ outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the common mode
R
V
input range of the op amp used in the combiner/loop filter.
Figure 2. 666–Channel, Computer–Controlled, Mobile Radiotelephone Synthesizer
for 800 MHz Cellular Radio Systems
MC145152–2 Data Sheet Continued on Page 23
MC145151–2 through MC145158–2
8
MOTOROLA
MOTOROLA [ MOTOROLA ]
