V58C2128(804/404/164)S
AC CHARACTERISTICS
PARAMETER
-6
-7
-75
-8
SYM-
BOL
MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
Data-out high-impedance window from
CK/CK
tHZ
tLZ
-0.7
-0.7
.75
+0.7
+0.7
-0.75 +0.75 -0.75 +0.75 -0.8 +0.8
-0.75 +0.75 -0.75 +0.75 -0.8 +0.8
ns
ns
18
18
14
14
14
14
Data-out low-impedance window from CK/
CK
Address and control input hold time
(fast slew rate)
tIHF
tISF
.90
.90
1
.90
.90
1
1.1
1.1
1.1
1.1
2
ns
Address and control input setup time
(fast slew rate)
.75
ns
Address and control input hold time
(slow slew rate)
tIHS
tISS
tMRD
0.80
0.80
2
ns
Address and control input setup time
(slow slew rate)
1
1
ns
LOAD MODE REGISTER command cycle
time
2
2
tCK
DQ-DQS hold, DQS to first DQ to go non-
tHP
-tQHS
tHP
-tQHS
tHP
-tQHS
tHP
-tQHS
valid,
tQH
ns
25, 26
per access
Data hold skew factor
tQHS
tRAS
0.60
0.75
0.75
1
ns
ns
ACTIVE to PRECHARGE command
120,00
0
120,00
0
120,00
0
120,00
0
42
45
45
50
35
46
ACTIVE to READ with Auto precharge
command
tRAP
tRC
tRAS(MIN) - (burst length * tCK/2)
ns
ns
ACTIVE to ACTIVE/AUTO REFRESH
command period
60
65
65
70
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
tRFC
tRCD
tRP
72
18
75
20
75
20
80
20
ns
ns
50
42
18
20
20
20
ns
tRPRE
tRPST
0.9
0.4
1.1
0.6
0.9
0.4
1.1
0.6
0.9
0.4
1.1
0.6
0.9
0.4
1.1
0.6
tCK
tCK
DQS read postamble
ACTIVE bank a to ACTIVE bank b com-
mand
tRRD
12
15
15
15
ns
DQS write preamble
tWPRE
tWPRES
tWPST
tWR
0.25
0
0.25
0
0.25
0
0.25
0
tCK
ns
DQS write preamble setup time
DQS write postamble
Write recovery time
20, 21
19
0.4
15
1
0.6
0.4
15
1
0.6
0.4
15
1
0.6
0.4
15
1
0.6
tCK
ns
Internal WRITE to READ command delay tWTR
tCK
Data valid output window
na
tQH - tDQSQ tQH - tDQSQ tQH - tDQSQ tQH - tDQSQ ns
25
Average periodic refresh interval
Terminating voltage delay to VDD
tREFI
tVTD
15.6
15.6
15.6
15.6
us
ns
0
0
0
0
V58C2128(804/404/164)S Rev. 1.6 March 2002
36
MOSEL [ MOSEL VITELIC, CORP ]
