SP8853A/B
V
1
CC
V
4
CC
V
4
CC
13·25k
1250
500
1250
6k
6k
62·5k
12k
12k
500
10
3, 14, 6
77·5k
RF INPUT
24k
15, 16
11
RF INPUT
10k
176k
0·8mA
50µA
37·5k
50µA
27·5µA
V
1
EE
V
4
EE
V
4
EE
Fig. 8a RF preamplifer inputs
Fig. 8b F1/F2 data and
power down inputs
Fig. 8c Hysteresis inputs, data clock
and enable
V
4 (CP1) / V 3 (CP2)
CC CC
V
2
CC
V
3
CC
24k
20
21
f
UP
f UP
3, 25
V
EE
80k
27
V
CC
100µA
f
DOWN
f DOWN
35k
V
3
EE
50µA
V 2
EE
V
4 (CP1) / V 3 (CP2)
EE EE
Fig. 8d Oscillator pins
Fig. 8e Lock detect output
Fig. 8f Phase detector charge pumps
V 4
CC
10k
V 3
CC
EXTERNAL
RESISTOR
RPD
(See Table 1)
FROM M OR R
COUNTERS
24
4, 5
OUTPUT
ENABLE
V
3
EE
100µA
50µA
V
4
EE
Fig. 8g Charge pump 2 current
programming
Fig. 8h F
PD
and F
outputs
REF
Fig. 8 Input and output interface diagrams
8
MITEL [ MITEL NETWORKS CORPORATION ]
