Advance Information
MT9160B/61B
IRQ
Microport Read/Write Access
n+2 n+3
FP
n-3
n-2
n-1
n
n+1
n+4*
DSTo/
DSTi
Di-bit Group
Receive
D-Channel
I
II
III
IV
D0
D1
D2
D3 D4
D5
D6
D7
No preset value
I
II
III
IV
Di-bit Group
Transmit
D0
D1
D2
D3 D4
D5
D6
D7
D-Channel
Power-up reset to 1111 1111
* note that frame n+4 is equivalent to frame n of the next cycle.
Figure 7a - D-Channel 16 kb/s Operation
FP
C4i
C2
t =500 nsec max
ir
R
= 10 k
DSTo/
DSTi
pullup
D0
D1
t =500 nsec max
if
IRQ
8 kb/s operation
Reset coincident with
Read/Write of Address 04 Hex
16 kb/s operation
Microport Read/Write Access
or next FP, whichever occurs first
Figure 7b - IRQ Timing Diagram
IRQ
Microport Read/Write Access
FP
n+2
n+4
n+6
n-7
I
n-6
II
n-5
n-4
n-3
V
n-2
n-1
n
n+1
n+3
n+5
n+7
n+8
D-Channel
III
D2
IV
D3
VI
D5
VII
D6
VIII
D7
Di-bit Group
Receive
D-Channel
D0
D1
D4
I
D0
II
D1
III
D2
IV
D3
V
D4
VI
D5
VII
D6
VIII
D7
No preset value
Di-bit Group
Transmit
D-Channel
Power-up reset to 1111 1111
Figure 7c - D-Channel 8 kb/s Operation
87
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