MT9076
Preliminary Information
Bit
Name
Functional Description
7
FEOM
Framing Bit Error Counter Overflow Interrupt Mask. When unmasked an interrupt is
initiated whenever the framing bit error counter changes from FFH to 00H. If 1 - unmasked,
0 - masked.
6
5
CRCOM
OOFOM
CRC-6 Error Counter Overflow Interrupt Mask. When unmasked an interrupt is initiated
whenever the CRC-6 error counter changes from FFH to 00H. If 1 - unmasked, 0 - masked.
Out Of Frame Counter Overflow Interrupt Mask. When unmasked an interrupt is initiated
whenever the out of frame counter changes state from changes from FFH to 00H. If 1 -
unmasked, 0 - masked.
4
3
2
1
0
COFAOM Change of Frame Alignment Counter Overflow Interrupt Mask. When unmasked an
interrupt is initiated whenever the change of frame alignment counter changes from FFH to
00H. If 1 - unmasked, 0 - masked.
LCVOM
Line Code Violation Counter Overflow Interrupt Mask. When unmasked an interrupt is
initiated whenever the line code violation counter changes from FFH to 00H. If 1-
unmasked, 0 - masked.
PRBSOM Psuedo Random Bit Sequence Error Counter Overflow Interrupt Mask. When
unmasked an interrupt will be generated whenever the PRBS error counter changes from
FFH to 00H. If 1 - unmasked, 0 - masked.
PRBSMFOM Psuedo Random Bit Sequence Multiframe Counter Overflow Interrupt Mask. When
unmasked an interrupt will be generated whenever the multiframe counter attached to the
PRBS error counter overflows. FFH to 00H. If 1 - unmasked, 0 - masked.
MFOOFOM Multiframes Out Of Sync Overflow Interrupt Mask. When unmasked an interrupt will be
generated when the multiframes out of frame counter changes from FFH to 00H. If 1 -
unmasked, 0 - masked.
Table 33 - Interrupt Mask Word Two (T1)
(Page 1, Address 1DH)
66
MITEL [ MITEL NETWORKS CORPORATION ]
