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MT9074AL 参数 Datasheet PDF下载

MT9074AL图片预览
型号: MT9074AL
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1单芯片收发器 [T1/E1/J1 Single Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 122 页 / 371 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Advance Information  
MT9074  
Bit  
Name  
Functional Description  
Bit  
Name  
Functional Description  
Errored Framing Alignment  
3
LOSI  
Loss of Signal Interrupt.  
When unmasked this interrupt  
bit goes high whenever a loss of  
signal (either analog - received  
signal 20 or 40 dB below  
7
FERRI  
Signal Interrupt. When unmasked  
this interrupt bit goes high  
whenever an erroneous bit in  
frame alignment signal is detected  
(provided the circuit is in terminal  
frame sync). Reading this register  
clears this bit.  
nominal or digital  
-
192  
consecutive  
0’s  
received)  
condition exists.  
2
CEFI  
Consecutively Errored Frame  
Alignment Interrupt. When  
unmasked this interrupt bit goes  
high whenever the error in last  
two frame alignment signals  
occurs. Reading this register  
clears this bit.  
6
5
4
3
CRCERRI CRC-4 Error Interrupt. When  
unmasked this interrupt bit goes  
high whenever a local CRC-4 error  
occurs. Reading this register  
clears this bit.  
EBITI  
AIS16I  
BPVI  
Receive E-bit Error Interrupt.  
When unmasked this interrupt bit  
goes high upon detection of a  
wrong E-bit in multiframe. Reading  
this register clears this bit.  
1
0
YI  
Receive Y-bit Interrupt. When  
unmasked this interrupt goes  
high whenever a change of  
status loss of multiframe  
alignment occurs. Reading this  
register clears this bit.  
Alarm  
Indication  
Signal  
Interrupt. When unmasked this  
interrupt bit goes high whenever all  
ones in time slot 16 occur.Reading  
this register clears this bit.  
RxSLPI  
Receive SLIP Interrupt. When  
unmasked this interrupt bit goes  
high whenever  
a
controlled  
frame slip occurs in the receive  
elastic buffer. Reading this  
register clears this bit.  
Bipolar Violation Interrupt. When  
unmasked this interrupt bit goes  
high whenever a bipolar violation  
(excluding HDB3 encoding) is  
Table 126 - Interrupt Word Zero  
(Page 4, Address 1BH) (E1)  
encountered.  
Reading  
this  
register clears this bit.  
2
1
0
PRBSERR Pseudo Random Bit Sequence  
I
Error Interrupt. When unmasked  
this interrupt bit goes high upon  
detection of an error with  
a
channel selected for PRBS testing.  
Reading this register clears this bit.  
AUXPI  
Auxiliary  
Pattern  
Alarm  
Interrupt. When unmasked this  
interrupt bit goes high whenever a  
sequence of 512 bit consecutive  
101010. occur. Reading this  
register clears this bit.  
RAII  
Remote  
alarm  
Indication  
Interrupt. When unmasked this  
interrupt bit goes high  
whenever the bit 3 of non-frame  
alignment signal is high. Reading  
this register clears this bit.  
Table 127 - Interrupt Word One  
(Page 4, Address 1CH) (E1)  
91  
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