MT9074
Advance Information
Bit Name
Functional Description
Bit Name
7-2 - - -
Functional Description
7-2
- - - Unused
Unused
1-0 EC9-8 E bit Error Counter. The most
significant 2 bits of the E bit error
counter.
1-0 CC9 - 8 CRC-4 Error Counter These are the
most significant eight bits of the
CRC-64error counter.
Table 120 - E-bit Error Counter
(Page 4, Address 14H) (E1)
Table 124 - CRC-4 Error Counter CEt
(Page 4, Address 18H) (E1)
Bit Name
Functional Description
Bit Name
Functional Description
7 - 0 CC7 - 0 CRC-4 Error Counter. These are
the least significant eight bits of the
CRC-4 error counter.
7 - 0 EC7-0 E bit Error Counter. The least
significant 8 bits of the E-bit error
counter.
Table 125 - CRC-4 Error Counter CEt
(Page 4, Address 19H) (E1)
Table 121 - E-bit Error Counter
(Page 4, Address 15H) (E1)
Bit
Name
Functional Description
Terminal Frame
Bit
Name
Functional Description
7
TFSYNI
7 - 0 BPV15 - 8 Most Significant Bits of the
BPV Counter. The most
Synchronization Interrupt.
When unmasked this interrupt
bit goes high whenever
significant eight bits of a 16 bit
counter that is incremented once
for every bipolar violation error
received.
a
change of state of terminal
frame synchronization condition
exists. Reading this register
clears this bit.
Table 122 - Most Significant Bits of the BPV
Counter
(Page 4, Address 16H) (E1)
6
5
4
MFSYNI
Multiframe Synchronization
Interrupt. When unmasked this
interrupt bit goes high whenever
a change of state of multiframe
synchronization
condition
Bit
Name
Functional Description
exists. Reading this register
clears this bit.
7 - 0 BPV7 - 0 Least Significant Bits of the BPV
Counter. The least significant eight
bits of a 16 bit counter that is
incremented once for every bipolar
violation error received.
CRCSYNI CRC-4
Synchronization
Interrupt. When unmasked this
interrupt bit goes high whenever
change of state of CRC-4
synchronization
condition
Table 123 - Least Significant Bits of the BPV
Counter
exists. Reading this register
clears this bit.
(Page 4, Address 17H) (E1)
AISI
Alarm
Indication
Signal
Interrupt. When unmasked this
interrupt bit goes high whenever
a change of state of received all
ones condition exists. Reading
this register clears this bit.
Table 126 - Interrupt Word Zero
(Page 4, Address 1BH) (E1)
90
MITEL [ MITEL NETWORKS CORPORATION ]
