MT90220
AC Electrical Characteristics - JTAG Port and RESET Pin Timing
Parameter
TCK period width
Symbol
Min
Typ
Max
Units
Test Conditions
t
100
40
40
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
BSDL spec’s 12 MHz
TCLK
TCK period width LOW
t
TCLKL
TCLKH
TCK period width HIGH
TDI setup time to TCK rising
TDI hold time after TCK rising
TMS setup time to TCK rising
TMS hold time after TCK rising
TDO delay from TCK falling
TRST pulse width
t
t
DISU
t
33
2
DIH
t
MSSU
t
t
5
MSH
20
C = 30 pF
DOD
L
t
15
2
TRST
RESET pulse width
t
70 MCLK cycles
RST
tmssu
tmsh
TMS
tdih
ttclk
tdisu
TDI
ttclkl
ttclkh
TCK
tdod
TDO
ttrst
TRST
Figure 35 - JTAG Port Timing
98
MITEL [ MITEL NETWORKS CORPORATION ]
