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MT89L86 参数 Datasheet PDF下载

MT89L86图片预览
型号: MT89L86
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUS⑩系列多速率数字开关 [CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch]
分类和应用: 开关
文件页数/大小: 40 页 / 175 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Advance Information  
MT89L86  
Connection Memory High - Read/Write  
7
6
5
4
3
2
1
0
X
V/C  
SAB3 CAB6 CAB5  
MC  
CSTo  
OE  
(CM high bits)  
Bit  
6
Name  
V/C  
Description  
Variable/Constant Throughput Delay Mode. This bit is used to select between Variable  
(LOW) and Constant Delay (HIGH) modes in a per-channel basis. Tables 1 and 2  
describe the switching configurations that have this function. In the modes where this  
function is not available, this bit ignored.  
5
SAB3  
Source Stream Address bit 3. This bit is used along with bits SAB0-2 in CML to select  
up to 16 different source streams for the connection. Depending on the state of DMO bit  
and the switching configuration enabled, not all SAB3-0 bits have to be used.  
See Tables 9 and 10 for details on the utilization of the SAB bits.  
4-3  
CAB6-5 Source Channel Address bits 5 and 6. These two bits are used together with bits  
CAB0-4 in Connect Memory Low to select up 128 different source channels for the  
connection. Depending on the data rate used in the input/output streams, 5, 6 or all 7  
CAB bits can be used respectively, to select 32, 64 or 128 different channels.  
See Tables 9 and 10 for details on the utilization of the CAB bits.  
2
MC  
Message Channel. When 1, the contents of the corresponding location in Connection  
Memory Low are output on the corresponding channel and stream. When 0, the contents  
of the programmed location in Connection Memory Low act as an address for the Data  
Memory and so determine the source of the connection to the location’s channel and  
stream.  
1
0
CSTo  
OE  
CSTo Bit. This bit is only available in 2.048 Mb/s applications. It drives a bit time on the  
CSTo output pin.  
Output Enable. This bit enables the output drivers on a per-channel basis. This allows  
individual channels on individual streams to be made high-impedance, allowing switch  
matrices to be constructed. A HIGH enables the driver and a LOW disables it.  
Figure 5 - Connection Memory High (CMH) Bits  
x=Don’t care  
17