MT8979 ISO-CMOS
BIT
7
NAME
IU1
DESCRIPTION
International Use 1: When the CRC is disabled and SiMUX bit in MCW3 is disabled, this
bit is transmitted on the CEPT 2048 kbit/s link in bit position 1 of timeslot 0 of
non-frame-alignment frames . It is reserved for international use and should be kept at ‘1‘
when not used. If CRC is enabled and SiMUX is disabled, this bit is transmitted in bit 1 of
timeslot 0 for frame 13 and 15. If both CRC and SiMUX are enabled, then this bit is not
used.
6
5
NFAF
ALM
Transmit Non-Frame Alignment Bit: This bit is transmitted on the CEPT 2048 kbit/s link
in bit position 2 of timeslot 0 of non-frame-alignment frames. In order to differentiate
between frame-alignment frames and non-frame-alignment frames, this bit should be kept
at ‘1‘.
Non-Frame Alignment Alarm: This bit is transmitted on the CEPT 2048 kbit/s link in bit
position 3 of timeslot 0 of non-frame-alignment frames . It is used to signal an alarm to the
remote end of the CEPT link. The bit should be set to ‘1‘ to signal an alarm and should be
kept at ‘0‘ under normal operation.
4-0
NU1-5
National Use: These bits are transmitted on the CEPT 2048 kbit/s link in bit positions 4 to
8 of timeslot 0 of non-frame-alignment frames . These bits are reserved for national use,
and on crossing international borders they should be set to ‘1‘.
Table 8. Non-Frame-Alignment Signal: Data Format for CSTi1 Channel 17
BIT
NAME
DESCRIPTION
7
6
N/A
Keep at zero for normal operation.
SiMUX
When set to ‘1’, this bit will cause the SMFI CRC result to be transmitted in the next
outgoing Si1 bit in frame 13 and the SMFII CRC result to be transmitted in the next
outgoing Si2 bit in frame 15.
5
4
3
RMLOOP
HDB3en
Maint
Remote Loopback: If set the RxA and RxB signals are looped to TxB and TxA
respectively.
Enable HDB3 Encoding: A ’1’ will disable the HDB3 line coding and transmit the
information transparently.
Maintenance: A ’1’ will force a terminal reframe if the CRC multiframe synchro- nization
is not achieved within 8 ms of frame synchronization. Reframe will also be generated if
more than 914 CRC errors occur within a one second interval (CRC error counter is reset
with every one second interval). A ’0’ will disable this option.
2
CRCen
Enable Cyclical Redundancy Check: A ’1’ will enable the CRC generation on the
transmit data. A ’0’ will disable the CRC generator. The CRC receiver is always active
regardless of the state of CRCen.
1
0
DGLOOP
ReFR
Digital Loopack: When set, the transmitted signal is looped around from DSTi to DSTo.
The normal received data is interrupted.
Force Reframe: If set, for at least 1 frame, and then cleared the chip will begin to search
for a new frame position when the chip detects the change in state from high to low. Only
the change from high to low will cause a reframe, not a continuous low level.
Table 9. Master Control Word 3 (MCW3): Data Format for CSTi1 Channel 18
4-174
MITEL [ MITEL NETWORKS CORPORATION ]
