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MT8979 参数 Datasheet PDF下载

MT8979图片预览
型号: MT8979
PDF下载: 下载PDF文件 查看货源
内容描述: ISO- CMOS ST- BUS⑩家庭CEPT PCM 30 / CRC - 4成帧器和接口 [ISO-CMOS ST-BUS⑩ FAMILY CEPT PCM 30/CRC-4 Framer & Interface]
分类和应用: PC
文件页数/大小: 26 页 / 343 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT8979 ISO-CMOS  
BIT  
NAME  
DESCRIPTION  
7
6
5
(N/A)  
(N/A)  
CCS  
Keep at ‘1‘ for normal operation.  
Keep at ‘0‘ for normal operation.  
Common Channel Signalling: If 1, then the MT8979 operates in its common channel  
signalling mode. Channel 16 on the DSTi pin is transmitted on timeslot 16 of the CEPT  
link, and timeslot 16 from the received CEPT link is output on channel 16 on the DSTo  
pin. Channel 15 on the CSTi0 pin contains the information for the control of timeslot 16.  
Channels 0 to 15 on CSTi1 and CSTo are unused.  
If ‘0‘, the device is in channel associated signalling mode where channel 16 is used to  
transmit the ABCD signalling bits.  
4
8KHzSEL  
TXAIS  
8KHz Select: If ‘1‘, then an 8 kHz signal synchronized to the received CEPT 2048 kbit/s  
link is output on the E8Ko pin. This feature is only valid when frame synchronization is  
received from the CEPT link.  
If ‘0‘, then the E8Ko pin goes into its high impedance state.  
3
2
1
0
Transmit Alarm Indication Signal:  
If ‘1‘, then an all 1’ s alarm signal is transmitted on all timeslots.  
If ‘0‘, then the timeslots functions normally.  
TXTS16AIS Transmit Timeslot 16 Alarm Indication Signal:  
If ‘1‘, then an all 1’s alarm signal is transmitted on timeslot 16.  
If ‘0‘, then timeslot 16 functions normally.  
XCTL  
External Control:  
If ‘1‘, then the XCtl pin is driven high.  
If ‘0‘, then the XCtl pin is driven low.  
(N/A)  
(unused)  
Table 4. Master Control 2 (MCW2): Data Format for CSTi0 Channel 31  
BIT  
7-4  
NAME  
DESCRIPTION  
MA1-4  
Transmit Multiframe Alignment Bits 1 to 4: These bits are transmitted on the CEPT  
2048 kbit/s link in bit positions 1 to 4 of timeslot 16 of frame 0 of the multiframe. They  
should be kept at ‘0‘ to allow multiframe alignment to be detected.  
3
2
X1  
Y
This bit is transmitted on the CEPT 2048 kbit/s link in bit position 5 of timeslot 16 of  
frame 0 of the multiframe. It is a spare bit which should be kept at ‘1‘ if unused.  
This bit is transmitted on the CEPT 2048 kbit/s link in bit position 6 of timeslot 16 of  
frame 0 of the multiframe. It is used to indicate the loss of multiframe alignment to the  
remote end of the link. A ‘1‘ on this bit is the signal that multiframe alignment on the  
received link has been lost. A ‘0’ indicates that multiframe alignment is detected.  
1,0  
X2,X3  
These bits are transmitted on the CEPT 2048 kbit/s link in bit positions 7 and 8  
respectively, of timeslot 16 of frame 0 of the multiframe. They are spare bits which  
should be kept at ‘1‘ if unused.  
Table 5. Multiframe Alignment Signal: Data Format for CSTi1 Channel 0  
on the Transmitted CEPT Link  
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