MT8977 ISO-CMOS
Preliminary Information
Appendix
Control and Status Register Summary
7
6
5
4
3
2
1
0
Debounce
1 Disabled
0 Enabled
TSPZCS
1 Disabled
0 Enabled
B8ZS
8KHSel
1 Disabled
0 Enabled
XCtI
1 Set High
0 Cleared
ESFYLW
1 Enabled
0 Disabled
Robbed Bit
1 Disabled
0 Enabled
YLALR
1 Enabled
0 Disabled
1 B8ZS
0 Jammed
Bit
Master Control Word 1 (Channel 15, CSTi0)
RMLOOP
1 Enabled
0 Disabled
DGLOOP
1 Enabled
0 Disabled
ALL 1’s
1 Enabled
0 Disabled
ESF/D4
1 ESF
0 D3/D4
Reframe
SLC-96
1 Enabled
0 Disabled
CRC/MIMIC
Maint.
1 4/12
Device
See Note 1
Reframes on
High to Low
Transition
0 2/4
Master Control Word 2 (Channel 31, CSTi0)
Polarity
Loop
Data
1 Enabled
0 Disabled
1 No Inversion
1 Ch. looped
back
UNUSED - KEEP AT 0
0 Inversion
0 Normal
Per Channel Control Words (All Channels on CSTi0 Except Channels 3, 7, 11, 15, 19, 23, 27 and 31)
A
B
C
D
UNUSED - KEEP AT 0
Txt. Sig. Bit
Txt. Sig. Bit
Txt. Sig. Bit
Txt. Sig. Bit
Per Channel Control Words (All Channels on CSTi1 Except Channels 3, 7, 11, 15, 19, 23, 27 and 31)
YLAIR
MIMIC
ERR
ESFYLW
MFSYNC
BPV
SLIP
Changes
State
when Slip
Performed
SYN
1 Detected
1 Detected
F Error
T
Count
1 Detected
1 Not Detected
Bipolar
Violation
count
1 Out-of-Sync.
0 Normal
0 Not
Detected
0 Not
Detected
0 Detected
0 In-Sync
Master Status Word 1 (Channel 15, CSTo)
BlAlm
FrCnt
XSt
1 Detected
Frame
Count
1 Xst High
0 Xst Low
BIPOLAR VIOLATION COUNT
CRC-ERROR COUNT
0 Not Detected
Master Status Word 2 (Channel 31, CSTo)
CHANNEL COUNT
BIT COUNT
Phase Status Word (Channel 3, CSTo)
A
B
C
D
UNUSED
Rec’d. Sig. Bit
Rec’d. Sig. Bit
Rec’d. Sig. Bit
Rec’d. Sig. Bit
Per Channel Status Word (All Channels on CSTo Except Channels 3, 7, 11, 15, 19, 23, 27, 31)
Note 1: In ESF mode:
1: CRC calc. ignored during Sync.
0: CRC checked for Sync.
In D3/D4 mode:
1: Sync. to first correct S-bit pattern.
0: Will not Sync. if Mimic detected.
4-124
MITEL [ MITEL NETWORKS CORPORATION ]
