Preliminary Information
ISO-CMOS MT8977
AC Electrical Characteristics† - Timing For DS1 Link Bit Cells (Figure 15)
‡
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
2
E1.5i Clock Period
E1.5i Clock Width High or Low
tPEC
tWEC
500
250
648
324
ns
ns
tPEC = 648 ns
† Timing is over recommended temperature & power supply voltage ranges.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
DS1 BIT CELLS FOR
RECEPTION
BIT CELL
BIT CELL
tWEC
2.0V
E1.5i
0.8V
tPEC
tWEC
Figure 15 - DS1 Receive Clock Timing
AC Electrical Characteristics† - 2048 kbit/s ST-BUS Streams (Figure 16)
‡
Characteristics
Serial Output Delay
Sym
Min
Typ
Max
Units
Test Conditions
1
2
3
tSOD
tSIS
tSIH
125
ns
ns
ns
150 pF load
Serial Input Setup Time
Serial Input Hold Time
15
50
† Timing is over recommended temperature & power supply voltage ranges.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Bit Cell Boundaries
2.0V
C2i
0.8V
2.4V
DSTo or
CSTo
0.4V
tSOD
tSOD
2.0V
0.8V
DSTi,
CSTi0/CSTi1
tSIH
tSIS
Figure 16 - ST-BUS Stream Timing
4-119
MITEL [ MITEL NETWORKS CORPORATION ]
