ISO-CMOS MT8952B
AC Electrical Characteristics† - Serial Port in External Timing Mode - (Figure 23 )
Voltages are with respect to ground (V ) unless otherwise stated.
SS
‡
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
Clock period on CKi pin
CKi transition time
t
400
ns
ns
ns
ns
ns
ns
CEX
t
20
T
TxCEN/RxCEN setup time
TxCEN/RxCEN hold time
CDSTi setup time
t
60
40
20
65
CENS
CENH
t
t
STiS
CDSTi hold time
t
STiH
t
t
125
85
Test load circuit 1 (Fig. 26)
SToZL
SToZH
CDSTo delay
ns
ns
C =150pF
L
8
t
t
SToLZ
SToHZ
CDSTo disable time
Test load circuit 3 (Fig. 26)
† Timing is over recommended temperature & power supply voltages (V =5V±5%, V =0V, T =–40 to 85°C).
DD
SS
A
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
t
CEX
CKi
t
T
t
CENH
TxCEN/
RxCEN
t
CENS
t
STiH
t
STiS
CDSTi
CDSTo
VALID DATA
t
t
t
t
SToHZ
SToLZ
SToZL
SToZH
HIGH
IMPEDANCE
HIGH IMPEDANCE
Figure 23 - Serial Port Inputs and Outputs in External Timing Mode
Note: The frequency of the clock input (CKi) should be at the output bit rate in the External Timing Mode.
F0i
125 µsec
Channel Channel
31
Channel
1
Channel
2
Channel Channel
29 30
Channel
31
Channel
ST-BUS
• • • • • • • •
0
0
Least
Significant
Bit
Most
Significant
Bit
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
(D0 on the Data
Bus)
(D7 on the Data
Bus)
3.9 µsec
Figure 24 - ST-BUS Format
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