MT8931C
AC Electrical Characteristics† - ST-BUS Timing NT Mode (Ref. Figure 22)
‡
Characteristics
Sym
Min
Typ
Max Units
Test Conditions
1
2
3
4
5
6
7
8
9
F0b input pulse width
Frame pulse (F0b) set-up time
Frame pulse (F0b) hold time
C4b input clock period
C4b pulse width High or Low
C4b transition time
tFPW
tFPS
tFPH
tP4o
tC4W
tC4T
tDFD
tDFW
tSIS
122
35
244
ns
ns
ns
ns
ns
ns
50
244
122
20
F0od delay
20
87
ns
ns
ns
ns
ns
40 pF Load
F0od pulse width
244
Serial input set-up time
70
0
10 Serial input hold time
11 Serial output delay
tSIH
tSOD
160
320
50 pF load
50 pF load (HDLC
connected to ST-BUS)
12 HALF input setup time
13 HALF input hold time
tHAS
tHAH
0
ns
ns
200
† Timing is over recommended temperature & power supply voltages
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
ST-BUS Bit Cell
tFPW
VIH
VIL
F0b
tP4o
tFPS
tFPH
tC4W
VIH
VIL
C4b
tDFD
tC4T
tC4W
VOH
VOL
F0od
DSTi
tSIH
tSIS
tDFW
VIH
VIL
tSOD
VOH
VOL
DSTo
HALF
tHAH
tHAS
VIH
VIL
Figure 22 - ST-BUS Timing NT Mode
9-102