GP2021
Pin No
2
3
4
5
6
7
8
9
10
11
12
13
16
17
18
19
20
21
22
Signal Name
POWER_GOOD
NRESET_OP O
NARMSYS
XIN
XOUT
TXA
TXB
RXA
RXB
NROM / NC
NEEPROM / NC
NSPARE_CS / NC
NRAM / NC
NW0 / NC
NW1 / NC
NW2 / NC
NW3 / NC
NRD / NC
ARM_ALE / NC
I
I
O
O
O
1
I
O
O
O
O
O
O
O
O
O
O
Type
I
Description ARM System Mode
Description Standard Interface
Mode
Power Monitor input. High for normal operation. Low forces the GP2021 into
Power Down mode.
System Reset output (Active Low). Lasts for 4 MICRO_CLK cycles after all reset
conditions have cleared.
Processor Mode Selection input. When Low, this input selects ARM System
mode. When High, Standard Interface mode is selected.
Crystal input connection to Real Time Clock.
Crystal output connection from Real Time Clock.
Transmit Data output from Channel A of the Dual UART.
Transmit Data output from Channel B of the Dual UART.
Receive Data input to Channel A of the Dual UART. This pin acts as a master clock
input in Digital System Test mode.
Receive Data input to Channel B of the Dual UART. This pin acts as the Real Time
Clock reset in Digital System Test mode.
ROM Chip Select output (Active Low).
EEPROM Chip Select output (Active Low)
Spare Chip Select output (Active Low).
RAM Chip Select output (Active Low).
Byte 0 Write Strobe output (Active Low).
Byte 1 Write Strobe output (Active Low).
Byte 2 Write Strobe output (Active Low).
Byte 3 Write Strobe output (Active Low).
Read Data Strobe output (Active Low).
ALE output to the microprocessor
(Active High). Controls the transparent
latches at the microprocessor address
outputs.
Data Bus Enable output to the
microprocessor. When Low, places the
microprocessor data bus drivers in a
high impedance state.
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
Unused output. (Do not connect.)
23
DBE / NC
O
Unused output. (Do not connect.)
24
ACCUM_INT
O
A free running interrupt to the microprocessor. It allows control of data transfer
between the accumulators in the correlator and the microprocessor. It is active
Low when configured for ARM System mode or Motorola mode and is active High
in Intel mode.
An interrupt to the microprocessor. It allows control of measurement data transfer
between the correlator and the microprocessor. It is active Low when configured
for ARM System mode or Motorola mode and is active High in Intel mode.
Byte/Word input from the
microprocessor. Low indicates a byte
transfer, and High a word transfer.
Memory Request input from the
microprocessor. Low indicates that the
microprocessor requires a memory
access during the following cycle.
Opcode fetch input from the
microprocessor. Low indicates that an
instruction is being fetched and High
that data is being transferred.
Read/Write Select input from the
microprocessor. Low indicates a read
cycle and High a write cycle.
Microprocessor Clock output
(nominally 20MHz). Its phases can be
stretched under control of the
Microprocessor Interface.
Write–Read Program input. In Intel
mode, High selects 486 style
interface and Low 186 style.
Unused in Motorola mode
Multi–purpose discrete input.
25
MEAS_INT
O
26
NBW / WRPROG
I
27
NMREQ / DISCIP2
I
28
NOPC / NINTELMOT
I
High selects Motorola mode and
Low Intel mode.
29
NRW / DISCIP3
I
Multi–purpose discrete input.
30
MCLK / NC
O
Unused output. (Do not connect.)
5
MITEL [ MITEL NETWORKS CORPORATION ]
