ACE9050
SYNTHDATA
SYNTHCLK
DTFG
LATCH0
LATCH1
LATCH3
72
73
82
80
78
75
SYNTHDATA
SYNTHCLK
DTFG
LATCH0
ONRAD
SINTSLEEP
C1008
IRQSEND
IRQREC
PORT3[6]
PORT4[7]
PULSE WIDTH MODULATOR
DAC1
DAC2
OUT2 [1]
CONTROL
PORT5 [0]
}
PORT5 [5:4]
OUT2 [2]
LATCH2
MUX #1
MUX CONTROL
98
ACE
SERIAL
INTERFACE
}
INTERRUPTS
PWM #1
PWM #2
MRI IRW ID[7:0]
OUTP2 [1]/
PWM1
OUTP2 [2]/
PWM2/
LATCH2
LSICOM0
LSICOM1
LATCH1
LSICOM2
LSICOM3
LATCH3
LSICOM4
LSICOM5
LATCH2
LSICOM6
MRI IRW ID[7:0] STR_WIDTH
MUX #2
81
INTERNAL PORTS
EXTERNAL PORTS
OUT2 [7]
79
76
NOT BONDED
TO MUX #2
TO MUX #1
TO CPUCL PIN
POWERDET
SERV
3
54, 53, 52
TO
MUX #2
TO 6303
83
5
95
18-25
46-41
92,93
8
6
2
40,39,35-30
8
EMUL IP
EMUL IP
REFER TO TEXT
FOR INDIVIDUAL
BIT FUNCTIONS
O/P IN EMULATION
DATA
INTERNAL ADDRESS
PORT3 [7:0]
PORT4 [7:0]
PORT5 [7:0]
PORT3
PORT4
PORT5
PORT3
PORT4
PORT5
O/P PORT2
OUT_PORT2
OUT2 [6]
OUT2 [5:3]
OUT2 [2]
OUT2 [1]
OUT2 [0]
OUTP2 [7]
OUTP2 [6]
EMUL
AS
R/W
D [7:0]
A [7:0]
A [13:8]
A [15:14]
BA [17:14]
CSE2N
CSEPN
BUS INTERFACE
EMUL ONLY
EMUL IP
EMUL DATA/AD
IRW
ID7:0
AD15:0
MRI IRW ID[7:0] LVN1
I/P PORT1
IN_PORT1
ID [7:0]
INP1 [7]
INP1 [6]
INP1 [4:2]
INP1 [1:0]
INP1 [4:2]
RAM
6016 BYTES
(IRAM)
AD [12:0]
IRW
IRAM
IRQE
EXT. INTERRUPTS
IRQPRT4-RESET
IRQPRT5-MASK
IRQPRT6-READ
5
4
59-55
66-69
2
70, 71
INRQ [1:0]
50-47
29
28
4
MEMORY BANK
SWITCHING
EPROM
BANK_SEL
MRI IRW ID[4:0] AD[15:14]
ROM
512 BYTES
(IROM)
BOOT BLOCK
ID [7:0]
AD [8:0]
IRW
IROM
KEYPORT/CHIP ID
KEYP R/W TO PORT
KPOT O/P TRISTATE
MRI IRW ID[7:0]
ISDA ISCL
KPO [4:0]
KPI [3:0]
IN_PORT1
OUT_PORT2
26
OEN
IRQPRT4
DECODER
WEN
27
IRQPRT5
IRAM
EPROM
IROM
IROME
ACE9050
REGISTER
SELECTS
MEMORY
SELECTS
PORT4 [1]
PORT3 [1]
6303
MICROPROCESSOR
ID7:0
AND
IRW READ/WRITE
KERNEL
AD15:O
EMUL
ICN COUNTER I/P
RESET MRI CLOCK E
PORT1 [7:0]
PORT2 [4]
PORT2 [3]
BAUDCLK
8
7-9, 12-16
4
97
84
6
INTERRUPT IRQN
8
3
BAUD
P1 [7:0]
DFMS/P2 [4]
DTMS/P2 [3]
IRQN
BAUDCLK
BAUD RATE
CLOCK
PORT5 [2]
ENABLE RESET I2C
I2C_ADDR
I2C_DATA
I2C_CNTR
ISCL
P1 [4]
P1 [3]
I2C_INTERRUPT
IRQTX
IRQWS
IRQBISAT
IRQRX
IRQREQ
IRQSEND
8·064MHz
IRQTO
BRG
MRI IRW ID[7:0]
IRQN
I
2
C INTERRUPT
IRQE (EXTERNAL INT.)
IRQPRT0-RESET
IRQPRT1-MASK
IRQPRT2-READ
MRI IRW AD[15:0] SLEEP
BEEP ALARM RING
GENERATOR (BAR)
BAR
96
BAR
BARENABLE
BARHIGH
BARLOW
MRI ID[7:0] CLKBUS
126kHz
I2C_STAT
I2C_CCR
I
2
C
ISDA
INT
TESTN
CLKBUS IRW ID[7:0]
INTERRUPT
CONTROL
INTERRUPT SOURCE
MRI IRW ID[7:0]
OUT2 [0]
94
90
99
2
3
1
TO WATCHDOG
AND I
2
C
63
62
51
89
TO 6303
ICN (EMUL)
AFC/RXDATA
77
60
ICN
IFC COUNTER
IFFREQ (2432/256)
STIFCN (START/RESET)
PORT3 [0]
PORT3 [5]
INTERRUPTS
PORT4 [4]
PORT3 [3]
PORT3 [7]
IRQRX
IRQBISAT
IRQWS
IRQTX
AFC/RXDATA
NOMPLL
MDMSLP
ENMOD
MODEM
MODPRT0
MODPRT1
MODPRT2
ID [7:0]
BARPORT
TEST ACCESS ONLY
TXDATA
IRW
MRI
C1008
PORT5 [6]
PORT4 [3]
PORT3 [2]
PORT5 P[1]
CLOCK GENERATOR
XOSC-PD
TURBO
ENSIS
CLKENAB
E (CPU CLOCK)
CLKBUS
C1008
LVN1
CPUCL
54kHz/450kHz
V
DD
V
DDM
V
SS
11, 64, 65, 68
38
10, 17, 36, 37, 86, 87
INP1 [6]
74
91
CPUCL/
OUTP2 [0]
C1008
ECLK
XIN
XOUT
TESTN
WATCHDOG AND ATO
REWD
MASTER RESET
WATCHDOG
AND
RESET LOGIC
RESATO
FILTER
ATO LOGIC
IRQTO
MRI
LVN1
SAT MANAGEMENT
PORT4 [2]
SELECT
SAT
GENERATOR
SAT
MUX
SERV
MRN
TXDATA
TXSAT
RXSAT
EXRESN
RXCD
TXPOW
100
61
85
POFFN
CLKBUS IRW TESTN
INP1 [7]
POWDET
PORT3 [4] UPOFFN
Fig. 3 detailed block diagram of ACE9050
2