ADVANCE INFORMATION
VPC 323xD, VPC 324xD
FP Sub-
address
Function
Default
Name
DVCO
h’f8
h’f9
crystal oscillator center frequency adjust, –2048 ... 2047
–720 DVCO
crystal oscillator center frequency adjustment value for line-lock
mode, true adjust value is DVCO – ADJUST.
read only ADJUST
For factory crystal alignment, using standard video signal: disable
autolock mode, set DVCO = 0, set lock mode, read crystal offset from
ADJUST register and use negative value for initial center frequency
adjustment via DVCO.
h’f7
crystal oscillator line-locked mode, lock command/status
0
XLCK
write: 100
0
read: 0
enable lock
disable lock
unlocked
locked
>2047
h’b5
h’12
crystal oscillator line-locked mode, autolock feature. If autolock is
enabled, crystal oscillator locking is started automatically.
400 AUTOLCK
bit[11:0]
threshold, 0:autolock off
FP Status Register
general purpose control bits
bit[2:0]
bit[3]
bit[8:4]
bit[9]
reserved, do not change
vertical standard force
reserved, do not change
disable flywheel interlace
reserved, do not change
0
1
VFRC
DFLW
bit[11:10]
to enable vertical free run mode set vfrc to 1 and dflw to 0
h’13
standard recognition status
–
ASR
bit[0]
bit[1]
bit[2]
bit[3]
bit[4]
bit[5]
bit[6]
bit[7]
bit[8]
bit[9]
bit[12:10]
1
1
1
1
1
1
1
1
1
1
vertical lock
horizontally locked
no signal detected
color amplitude killer active
disable amplitude killer
color ident killer active
disable ident killer
interlace detected
no vertical sync detection
spurious vertical sync detection
reserved
h’14
h’cb
h’15
h’74
h’31
h’f0
input noise level, available only for VPC 323xC
number of lines per field, P/S: 312, N: 262
vertical field counter, incremented per field
measured sync amplitude value, nominal: 768 (PAL), 732 (NTSC)
measured burst amplitude
read only NOISE
read only NLPF
read only VCNT
read only SAMPL
read only BAMPL
firmware version number
read only
–
bit[7:0]
bit[11:8]
internal revision number
firmware release
hardware id see I2C register h’9f
Micronas
43
MICRONAS [ MICRONAS ]
