ADVANCE INFORMATION
VPC 323xD, VPC 324xD
2
I C Sub- Number
Mode
Function
Default
Name
address
of bits
h’96
8
w/r
ADC RANGE :
bit[0]
CIPCNTL
XAR
reserved (set to 0)
0/+3dB extended ADC range
bit[1]
0/1
0
0
0
1
0
INPUT PORT SELECT :
bit[2] 0/1 1/2 input port select
SOFTMIXER CONTROL:
RGBSEL
FBCLP
CIPCFBY
YUV
bit[5]
0/1
clamp fb to a programable value (0:normal
1: fb=31−FBOFFS )
bypass chroma 444−>422 decimation filter
bit[6]
0/1
RGB/YUV SELECT:
bit[7]
0/1
rgb/yuv input select
reserved (set to 0)
bit[4:3]
h’97
8
r
FB MONITOR:
CIPMON
FBHIGH
FBFALL
FBRISE
FBSTAT
bit[0]
bit[1]
bit[2]
bit[3]
0/1
0/1
0/1
0/1
set by fb high, reset by reg. read and fb low
set by fb falling edge, reset by reg. read
set by fb rising edge, reset by reg. read
fb status at register read
−
−
−
−
CLIP DETECTOR:
bit[4] 0/1
rgb/yuv input clip detect, reset by read
−
CLIPD
Hardware ID
h’9f
16
r
Hardware version number
read
only
bit[7:0] 0/255
hardware id 1=A, 2=B aso.
bit[11:8] 0/3
product code
0
VPC32x0D
1
VPC32x1D
2
VPC32x2D
3
VPC32x3D
bit[15:12]0/15
product code
3
4
VPC323xD 100Hz version
VPC324xD 50Hz version
Micronas
39
MICRONAS [ MICRONAS ]
