ADVANCE INFORMATION
VPC 323xD, VPC 324xD
2
I C Sub- Number
Mode
Function
Default
Name
address
of bits
PIP Control
h’84
16
w/r
VPC MODE:
0
VPCMODE
ENA_PIP
SINGVPC
MAINVPC
F16TO9
F16MHZ
W525
bit[0]
bit[1]
bit[2]
bit[3]
bit[4]
bit[5]
0/1
0/1
0/1
0/1
0/1
0/1
dis-/enable field memory control for PIP
double/single VPC application
select VPCpip/VPCmain mode
4:3/16:9 screen
13.5/16 MHz output pixel rate
vertical PIP window size is based on
a 625/525 line video
bit[7:6]
field memory type
FIFOTYPE
00
01
10
11
TI TMS4C2972/3
PHILIPS SAA 4955TJ
reserved
other (OKI MSM5412222, ...)
bit[11:8] are evaluated, only if bit[7:6]=11
bit[8]
bit[9]
bit[10]
bit[11]
bit[15:12]
0/1
0/1
0/1
0/1
delay the video output for 0/1 LLC1 clock
pos/neg polarity for WE and RE signals
pos/neg polarity for IE and OE signals
pos/neg polarity for RSTWR signal
reserved (set to 0)
VIDEODEL
WEREINV
IEOEINV
RSTWRINV
This register is updated when the PIPOPER register is written.
h’85
16
w/r
PIP MODE:
0
PIPMODE
MODSEL
FRAMOD
bit[3:0]
bit[4]
the number of the PIP mode to be selected
write one/both input field(s) of a frame into
the field buffer in case TWOFB=0,
only used in the expert mode, for VPCpip
or VPCsingle
0/1
0/1
bit[5]
use one/two field buffer(s), only used
TWOFB
in the expert mode
bit[13:6] are used, only for VPCmain
bit[6]
0/1
show video/the background color in the
main picture, only used in the expert mode
dis-/enable the vertical up-shifting
of the main picture
SHOWBGD
VSHIFT
bit[7]
0/1
bit[13:8] 0/1
bif[15:14]
number of lines for vertical up-shift
reserved (set to 0)
VOFFSET
This register is updated when the PIPOPER register is written.
Micronas
35
MICRONAS [ MICRONAS ]
