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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Output sync controller (OSCM/S)  
1: Background channel  
2: Output channel master  
3: Output channel slave  
The background channel has always the lowest priority. The priority between output  
channel master and slave is defined by an I²C Bus parameter PRIORMS. The figure  
below shows an example for the combination of the three channels. The background  
colour black has lowest priority. The picture content of master channel is a phone and  
the picture content of slave channel is a airplane. In this case the slave channel has the  
highest priority. To enable or disable the display of the master or slave channel the I²C  
parameters MASTERON and SLAVEON can be used.  
HOUT  
(PPLOP*2)*CLKD  
VOUT  
(NALOPD+1)*2  
VERPOSM  
VERPOSS  
4*LPFOP+1  
VERWIDTHS*4  
ALPFOPD*8  
VERWIDTHM*8  
(HORWIDTHM*8)*CLKD  
(HORPOSS*4)*CLKD  
(HORPOSM*4)*CLKD  
(HORWIDTHS*4)*CLKD  
(APPLOPD*8)*CLKD  
(NAPOPD*4)*CLKD  
BLANK  
(BLANLEN*8)*CLKD  
((6 MSBs of BLANDEL)*8 + (2  
LSBs of BLANDEL))*CLKD  
Figure 35  
Output I²C Bus parameter  
78  
Micronas  
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