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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Output sync controller (OSCM/S)  
VIN  
RMODE=1  
RMODE=0  
VOUT  
VOUT  
Figure 38  
VOUT generation depending on I²C Bus parameter RMODE  
The polarity of the VOUT signal is programmable by the I²C Bus parameter VOUTPOL.  
The VOUT signal has a delay of two CLKOUT clocks to the HOUT signal or in case of  
interlaced a delay of a half line plus two CLKOUT clocks.  
The INTERLACED signal can be used for AC-coupled deflections. Depending on the I²C  
Bus parameter INTMODE the value of this signal will be generated. The Table 69 shows  
the definition of this signal (compare "Operation mode generator" on page 83).  
outputfieldphase  
0
outputfieldphase  
1
outputfieldphase  
2/0  
outputfieldphase  
3/1  
INTMODE  
INTMODE(0)  
INTMODE(1)  
INTMODE(2)  
INTMODE(3)  
Table 69  
Output write I²C Bus parameter INTMODE  
I²C Bus  
Sub address  
Description  
parameter  
VOUTFR  
1: free run  
0: locked  
mode  
4Ah  
VOUT generator mode select  
RMODE  
1: progressive  
0: interlaced  
48h  
49h  
line-scanning pattern mode  
INTMODE  
Free programmable INTERLACED signal for AC-coupled  
deflection stages  
Table 70  
Output write I²C Bus parameter INTMODE  
82  
Micronas  
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