SDA9410
Preliminary Data Sheet
Application modes and memory concept
Mode
Input
Master
Channel
Input
Slave
Channel
Output
Display
Channel
Comment
SRC
SRC
SRC
SRC
625/50i
525/60i
625/50i
525/60i
625/50i
525/60i
625/50i
525/60i
625/50i
525/60i
525/60i
625/50i
625/50i
525/60i
525/60i
625/50i
625/100i
625/50p
Motion compensation for master channel possible
Motion compensation for master channel possible
525/120i
525/60p
625/100i
625/50p
joint line free display for slave channel possible
(NEW)
525/120i
525/60p
joint line free display for slave channel possible
(NEW)
SSC/
MUP
625/100i
625/50p
No motion compensation possible
SSC/
MUP
525/120i
525/60p
No motion compensation possible
SSC/
MUP
625/100i
625/50p
No motion compensation possible, no joint line
free display for slave channel possible
SSC/
MUP
525/120i
525/60p
No motion compensation possible, no joint line
free display for slave channel possible
Table 61
5.6.7
Supported data formats
Master slave switch
This chapter describes the I²C Bus parameters used to execute a master and slave
exchange.
I²C Bus
Sub address
Description
parameter
[Default]
MASTSLA
[0]
55h
Master / Slave shift:
1: Master and slave input signals are exchanged, reset of display
raster shift
0: Display raster is synchronized to input master channel (vertical
sync)
MASLSHFT
[0]
56h
Master / Slave shift:
1: Display raster is shifted slave phase to prepare a master/slave
switch
0: Display raster is synchronized to input master channel (vertical
sync)
Table 62
Input write I²C Bus parameter
68
Micronas