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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Application modes and memory concept  
Steps MEM- ORG-  
ORG-  
MEM- MEM- MEM- Operation  
OP  
MEMM MEMS  
WRM  
WRS  
RDS  
8
01  
1
1
0
0
X
changing picture sizes of master and slave by  
programming the corresponding decimation I²C  
Bus parameters  
9
01  
01  
1
1
0
0
0
0
1
1
X
X
exceeding a width of 512 pixel for the slave  
picture only one field can be stored  
10  
further changes of picture sizes until full size  
slave picture and 1/9 size master picture is  
displayed  
11  
12  
13  
01  
00  
00  
0
0
0
1
1
1
1
0
0
0
1
1
X
1
0
switching synchronization to slave channel and  
exchanging the inputs  
switching to SRC mode using still field based up  
conversion  
slave channel reading is switched to SRC  
memory configuration  
14  
15  
00  
00  
1
1
1
1
0
0
0
0
0
0
also the master channel works frame based  
programming STOPMOM and STOPMOS to  
frame based up conversion  
Table 58  
Performing a master slave exchange  
Starting with the double window configuration (figure 27 on page 64) the procedure is  
continued with an animation to perform an exchange of the master and slave sources to  
get a display like it is shown in figure 28 on page 65.  
In step 8 the picture size of the master channel is decreased and the size of the slave  
picture is increased continuously. When the width of the slave picture exceeds 512 pixel  
only one field can be stored (step 9). Joint line free display of the slave channel is not  
always possible in this configuration. When full size slave picture format and 1/9 master  
picture size is reached (step 10) an exchange of master and slave channel is possible.  
Unstable picture phases can be avoided when the display raster phase is adapted to the  
slave channel before the hardware exchange of both sources is done. For display phase  
raster shifting see "Master slave switch" on page 68.  
Now we can activate the SRC mode again. At first we just change the mode maintaining  
the field based conversions (step 12). Then the slave data configuration of the memory  
is changed to SRC configuration (step 13) and at last the master channel memory  
capacity is enlarged to 2 fields (step 14) and frame based up conversion modes are  
enabled (step 15).  
66  
Micronas  
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