SDA9410
5.6.6
Preliminary Data Sheet
Application modes and memory concept
Joint line free display
This chapter describes the I²C Bus parameters to get a joint line free display in SSC
mode.
I²C Bus
Sub address
Description
parameter
[Default]
RSHFTM
[0]
55h
Joint line free display of master channel by shifting the output raster
phase (SSC-Mode)
1: enabled
0: disabled
RSHFTS
[0]
55h
Joint line free display of master and slave channel by shifting the
output raster phase (SSC-Mode, RSHFTM=1)
1: enabled
0: disabled
SHFTSTEP
[0100]
55h
56h
Increment for raster phase shift per output frame (lines)
PROG_THRES
[0111100]
Threshold to display progressive PIP without joint lines
Table 59
Input write I²C Bus parameter
I²C Bus
Description
parameter
SHIFTACT
indicates active shifting process of the display raster phase
0: display phase shifting not active
1: display phase shift active
Table 60
Output read I²C Bus parameter
A special circuit is implemented to achieve a joint line free display in SSC mode (e.g.
Double Window Display). This circuit synchronizes the two input sources and removes
the joint lines by automatic controlled shifting of the display raster phase. This procedure
enlarges the value of OPDELM resulting in an delayed start of the output processing.
The I²C Bus parameters RSHFTM and RSHFTS enable joint line free display for master
and slave channel, separately. SHFTSTEP fixes the amount of lines which is added to
OPDELM with each output frame. The readable I²C Bus parameter SHIFTACT
signalizes the progressing shifting operation.
It is recommended to enable the registers RSHFTM and RSHFTS in all application
modes.
67
Micronas
MICRONAS [ MICRONAS ]
