SDA9410
Preliminary Data Sheet
Pin Description
Table 1
Symbol
Pin definitions and functions (continued)
Pin
Input Function
Outp.
Num.
INTERLACED
CLKM
6
O/TTL
I/TTL
I/TTL
I/TTL
O/ANA
O/TTL
I/TTL
O/ANA
O/ANA
S
Interlace signal for AC coupled vertical deflection
18
58
2
System clock master channel
System clock slave channel
CLKS
X1 / CLKD
X2
Crystal connection / System clock display channel
Crystal connection
1
CLK-OUT
TEST
3
System clock output
82
87
86
88
84
83
85
90
89
91
94
93
Test input, connect to VSS for normal operation
Analog luminance output Y
IY_O
IYQ_O
VDDY
Differential analog Y output, connect to VSS for normal operation
Supply voltage for analog parts DAC ( VDD = 3.3 V )
Analog luminance output U
IU_O
O/ANA
O/ANA
S
IUQ_O
VDDU
Differential analog U output, connect to VSS for normal operation
Supply voltage for analog parts DAC ( VDD = 3.3 V )
Analog luminance output V
IV_O
O/ANA
O/ANA
S
IVQ_O
VDDV
Differential analog V output, connect to VSS for normal operation
Supply voltage for analog parts DAC ( VDD = 3.3 V )
Analog reference voltage for DACs
UREF_I
RREF_I
I/ANA
Reference resistor for DACs
S: supply, I: input, O: output, TTL: digital (TTL)
ANA: analog
PD: pull down (switched on or off depending on I²C bus parameter FORMATM,
FORMATS or SLAVECON)
*) x - placeholder for number
18
Micronas
MICRONAS [ MICRONAS ]
