SDA 9380 - B21
Preliminary Data Sheet
System description
I :
interlaced
NI : non interlaced
If NSA = 0 (subaddr. 01/D5) number of lines per field is selfadaptable between 192 and 680 for each
specified H-frequency.
5.5
I²C-Bus control
5.5.1 I²C-Bus address
1 0 0 0 1 1 0
5.5.2 I²C-Bus format
write:
S 1 0 0 0 1 1 0 0 A
Subaddress
Status byte
A
A
Data Byte
A
A
A P
*****
*****
read:
S 1 0 0 0 1 1 0 1 A
Data Byte n
NA P
Reading starts at the last write address n. Specification of a subaddress in reading mode is not pos-
sible.
S: Start condition
A: Acknowledge
P: Stop condition
NA: Not Acknowledge
An automatically address increment function is implemented.
After switching on the IC, all bits are set to defined states.
Micronas
5-14
2001-01-29
MICRONAS [ MICRONAS ]
