PRELIMINARY DATA SHEET
MSP 34x2G
4.4. Pin Configurations
SC2_IN_L
SC2_IN_R
ASG
SC1_IN_L
SC1_IN_R
VREFTOP
NC
ASG
SC3_IN_R
SC3_IN_L
ASG
SC4_IN_R
SC4_IN_L
NC
MONO_IN
AVSS
AGNDC
AHVSS
AHVSS
NC
AVSS
NC
NC
NC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
AVSUP 65
40 CAPL_M
39 AHVSUP
38 CAPL_A
37 SC1_OUT_L
36 SC1_OUT_R
35 VREF1
AVSUP 66
ANA_IN1+ 67
ANA_IN− 68
ANA_IN2+ 69
TESTEN 70
XTAL_IN 71
XTAL_OUT 72
TP 73
34 SC2_OUT_L
33 SC2_OUT_R
32 ASG3
MSP 34x2G
AUD_CL_OUT 74
NC 75
31 DACM_S
30 DACM_SUB
29 DACM_C
28 DACM_L
27 DACM_R
26 VREF2
NC 76
D_CTR_I/O_1 77
D_CTR_I/O_0 78
ADR_SEL 79
STANDBYQ 80
25 DACA_L
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
NC
DACA_R
I2C_CL
I2C_DA
I2S_CL
I2S_WS
I2S_DA_OUT
I2S_DA_IN1
ADR_DA
ADR_WS
ADR_CL
DVSUP
DVSUP
NC
NC
RESETQ
NC
NC
NC
I2S_DA_IN2
DVSS
DVSS
DVSS
DVSUP
Fig. 4–4: 80-pin PQFP package
Micronas
57
MICRONAS [ MICRONAS ]
