MSP 34x2G
PRELIMINARY DATA SHEET
Pins 56, 57 SC1_IN_L/R – SCART1 Inputs (Fig. 4–16)
The analog input signal for SCART1 is fed to this pin.
Analog input connection must be AC-coupled.
the digital circuitry is flowing through the ground con-
nection point.
Pin 73, TP – This pin enables factory test modes. For
Pin 58, VREFTOP – Reference Voltage IF A/D Con-
verter (Fig. 4–13)
normal operation, it must be left vacant.
Via this pin, the reference voltage for the IF A/D con-
verter is decoupled. It must be connected to AVSS
pins with a 10-µF and a 100-nF capacitor in parallel.
Traces must be kept short.
Pin 74, AUD_CL_OUT – Audio Clock Output
(Fig. 4–12)
This is the 18.432 MHz main clock output.
Pins 75, 76, NC – Pins not connected.
Pin 59, NC – Pin not connected.
Pins 77, 78, D_CTR_I/O_1/0 – Digital Control Input/
Output Pins (Fig. 4–11)
These pins serve as general purpose input/output
pins. Pin D_CTR_I/O_1 can be used as an interrupt
request pin to the controller.
Pin 60 MONO_IN – Mono Input (Fig. 4–16)
The analog mono input signal is fed to this pin. Analog
input connection must be AC-coupled.
Pins 61, 62, AVSS* – Ground for Analog Power Supply
Voltage
Ground connection for the analog IF input circuitry of
the MSP.
Pin 79, ADR_SEL – I2C Bus Address Select
(Fig. 4–10)
By means of this pin, one of three device addresses for
the MSP can be selected. The pin can be connected to
ground (I2C device addresses 80/81hex), to +5 V sup-
ply (84/85hex), or left open (88/89hex).
Pins 63, 64, NC – Pins not connected.
Pins 65, 66, AVSUP* – Analog Power Supply Voltage
Power is supplied via this pin for the analog IF input cir-
cuitry of the MSP. This pin must be connected to the
+5 V supply.
Pin 80, STANDBYQ – Stand-by
In normal operation, this pin must be High. If the
MSP 34x2G is switched off by first pulling STANDBYQ
low and then (after >1 µs delay) switching off the 5 V,
but keeping the 8-V power supply (‘Stand-by’-mode),
the SCART switches maintain their position and func-
tion.
Pin 67, ANA_IN1+ – IF Input 1 (Fig. 4–13)
The analog sound IF signal is supplied to this pin.
Inputs must be AC-coupled. This pin is designed as
symmetrical input: ANA_IN1+ is internally connected
to one input of a symmetrical op amp, ANA_IN- to the
other.
* Application Note:
All ground pins should be connected to one low-resis-
tive ground plane. All supply pins should be connected
separately with short and low-resistive lines to the
power supply. Decoupling capacitors from DVSUP to
DVSS, AVSUP to AVSS, and AHVSUP to AHVSS are
recommended as closely as possible to these pins.
Decoupling of DVSUP and DVSS is most important.
We recommend using more than one capacitor. By
choosing different values, the frequency range of
active decoupling can be extended. In our application
boards we use: 220 pF, 470 pF, 1.5 nF, and 10 µF. The
capacitor with the lowest value should be placed near-
est to the DVSUP and DVSS pins.
Pin 68, ANA_IN− – IF Common (Fig. 4–13)
This pins serves as a common reference for ANA_IN1/
2+ inputs.
Pin 69, ANA_IN2+ – IF Input 2 (Fig. 4–13)
The analog sound if signal is supplied to this pin.
Inputs must be AC-coupled. This pin is designed as
symmetrical input: ANA_IN2+ is internally connected
to one input of a symmetrical op amp, ANA_IN− to the
other.
Pin 70, TESTEN – Test Enable Pin (Fig. 4–9)
This pin enables factory test modes. For normal opera-
tion, it must be connected to ground.
Pins 71, 72 XTAL_IN, XTAL_OUT – Crystal Input and
Output Pins (Fig. 4–12)
These pins are connected to an 18.432 MHz crystal
oscillator which is digitally tuned by integrated shunt
capacitances. An external clock can be fed into
XTAL_IN. The audio clock output signal AUD_CL_OUT
is derived from the oscillator. External capacitors at
each crystal pin to ground (AVSS) are required. It
should be verified by layout, that no supply current for
56
Micronas
MICRONAS [ MICRONAS ]
