MSP 34x2G
PRELIMINARY DATA SHEET
Pin No.
Pin Name
Type
Connection
(if not used)
Short Description
PQFP
80-pin
PLQFP PSDIP
64-pin
64-pin
73
74
56
64
TP
LV
LV
Test pin
57
1
AUD_CL_OUT
OUT
Audio clock output
(18.432 MHz)
75
76
77
78
79
80
58
59
60
61
62
63
2
3
4
5
6
7
NC
LV
LV
LV
LV
X
Not connected
NC
Not connected
D_CTR_I/O_1
D_CTR_I/O_0
ADR_SEL
STANDBYQ
IN/OUT
IN/OUT
IN
D_CTR_I/O_1
D_CTR_I/O_0
I2C Bus address select
Stand-by (low-active)
IN
X
4.3. Pin Descriptions
Pin numbers refer to the 80-pin PQFP package.
Pin 1, NC – Pin not connected.
Pin 9, ADR_WS – ADR Bus Word Strobe Output
(Fig. 4–7)
Word strobe output for the ADR bus.
Pin 2, I2C_CL – I2C Clock Input/Output (Fig. 4–8)
Pin 10, ADR_CL – ADR Bus Clock Output (Fig. 4–7)
Clock line for the ADR bus.
Via this pin, the I2C-bus clock signal has to be sup-
plied. The signal can be pulled down by the MSP in
case of wait conditions.
Pins 11, 12, 13, DVSUP* – Digital Supply Voltage
Power supply for the digital circuitry of the MSP. Must
be connected to a +5 V power supply.
Pin 3, I2C_DA – I2C Data Input/Output (Fig. 4–8)
Via this pin, the I2C-bus data is written to or read from
the MSP.
Pins 14, 15, 16, DVSS* – Digital Ground
Ground connection for the digital circuitry of the MSP.
Pin 4, I2S_CL – I2S Clock Input/Output (Fig. 4–11)
Clock line for the I2S bus. In master mode, this line is
driven by the MSP; in slave mode, an external I2S
clock has to be supplied.
Pin 17, I2S_DA_IN2 – I2S Data Input 2 (Fig. 4–9)
Second input of digital serial sound data to the MSP
via the I2S bus.
Pin 5, I2S_WS – I2S Word Strobe Input/Output
(Fig. 4–11)
Pins 18, 19, 20, NC – Pins not connected.
Word strobe line for the I2S bus. In master mode, this
line is driven by the MSP; in slave mode, an external
I2S word strobe has to be supplied.
Pin 21, RESETQ – Reset Input (Fig. 4–9)
In the steady state, high level is required. A low level
resets the MSP 34x2G.
Pin 6, I2S_DA_OUT – I2S Data Output (Fig. 4–7)
Output of digital serial sound data of the MSP on the
I2S bus.
Pins 22, 23, NC – Pins not connected.
Pins 24, 25, DACA_R/L – Headphone Outputs
(Fig. 4–17)
Output of the headphone signal. A 1-nF capacitor to
AHVSS must be connected to these pins. The DC off-
set on these pins depends on the selected headphone
volume.
Pin 7, I2S_DA_IN1 – I2S Data Input 1 (Fig. 4–9)
First input of digital serial sound data to the MSP via
the I2S bus.
Pin 8, ADR_DA – ADR Bus Data Output (Fig. 4–7)
Output of digital serial data to the DRP 3510A via the
ADR bus.
Pin 26, VREF2 – Reference Ground 2
Reference analog ground. This pin must be connected
separately to the single ground point (AHVSS). VREF2
serves as a clean ground and should be used as the
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