PRELIMINARY DATA SHEET
(Data: MSB first)
MSP 34x0D
1
fI2C
TI2C4
TI2C3
I2C_CL
TI2C1
TI2C5
TI2C6
TI2C2
I2C_DA as input
TI2COL2
TI2COL1
I2C_DA as output
Fig. 5–2: I2C bus timing diagram
5.2. Proposal for MSP 34x0D I2C Telegrams
5.2.1. Symbols
daw
dar
<
>
aa
dd
write device address
read device address
start condition
stop condition
address byte
data byte
5.2.2. Write Telegrams
<daw 00 d0 00>
<daw 10 aa aa dd dd>
<daw 12 aa aa dd dd>
write to CONTROL register
write data into demodulator
write data into DSP
5.2.3. Read Telegrams
<daw 11 aa aa <dar dd dd> read data from demodulator
<daw 13 aa aa <dar dd dd> read data from DSP
5.2.4. Examples
<80 00 80 00>
<80 00 00 00>
RESET MSP statically
clear RESET
<80 12 00 08 01 20>
set loudspeaker channel source
to NICAM and matrix to STEREO
Micronas
19
MICRONAS [ MICRONAS ]
