MAS 35x9F
DATA SHEET
2
4.6.2.1. I C Characteristics
at T = 25°C, V
= 2.2...3.6 V in P(L/M)QFP package
SUPI2C
Limit Values
Typ.
Symbol
Parameter
Pin Name
Unit
Test Conditions
Min.
Max.
I2C Input Specifications
fI2C
Upper limit I2C bus frequency I2CC
operation
400
300
300
kHz
ns
tI2C1
I2C START condition setup
time
I2CC, I2CD
I2CC, I2CD
tI2C2
I2C STOP condition setup
time
ns
tI2C3
tI2C4
tI2C5
I2C clock low pulse time
I2C clock high pulse time
I2CC
I2CC
I2CC
1250
1250
80
ns
ns
ns
I2C data setup time before
rising edge of clock
tI2C6
I2C data hold time after falling I2CC
edge of clock
80
ns
VI2COL
II2COH
I2C output low voltage
I2CC, I2CD
I2CC, I2CD
0.4
1
V
Iload = 3 mA
I2C output high leakage
current
µA
tI2COL1
I2C data output hold time after I2CC, I2CD
falling edge of clock
20
ns
ns
tI2COL2
I2C data output setup time
before rising edge of clock
I2CC, I2CD
250
fI2C = 400 kHz
VI2CIL
VI2CIH
tW
I2C input low voltage
I2C input high voltage
Wait time
I2CC, I2CD
I2CC, I2CD
I2CC, I2CD
0.3
4
VSUPI2C
VSUPI2C
ms
0.6
0
0.5
1/f
I2C
t
t
I2C3
I2C4
H
L
I2CC
t
t
t
t
I2C2
I2C1
I2C5
I2C6
H
L
I2CD as input
t
t
IC2OL1
I2COL2
H
L
I2CD as output
2
Fig. 4–20: I C timing diagram
72
June 30, 2004; 6251-505-1DS
Micronas