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CIP3250A 参数 Datasheet PDF下载

CIP3250A图片预览
型号: CIP3250A
PDF下载: 下载PDF文件 查看货源
内容描述: 组件接口处理器 [Component Interface Processor]
分类和应用:
文件页数/大小: 44 页 / 317 K
品牌: MICRONAS [ MICRONAS ]
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CIP 3250A  
ADVANCE INFORMATION  
2
Table 2–10: I C-Bus operation, continued  
Sub-  
Address  
(decimal)  
Label  
Bit No.  
(LSB = 0)  
Typical  
Operation  
Value  
Function  
2
I C registers for ADJUSTABLE LOWPASS FILTER  
05  
LPFLUM  
70  
0
Y luma low pass filter selection  
0 = bypass  
128 = Y1 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 1)  
192 = Y2 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 1)  
224 = Y3 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 2)  
240 = Y4 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 2)  
241 = Y5 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 2)  
249 = Y6 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 2)  
255 = Y7 (<06>CYLUM1=0, <06>CYLUM2=0,  
increment <16>YDEL by 2)  
[note: <16>YDEL has to be incremented to match group delays]  
06  
06  
07  
CYLUM1  
CYLUM2  
LPFCHR  
3
0
0
0
Y (luma) low pass filter offset correction 1  
0 = off  
1 = on  
2
Y (luma) low pass filter offset correction 2  
0 = off  
1 = on  
60  
UV (chroma) low pass filter selection  
0 = bypass  
96 = UV1 (<06>CYCHR1=0, <06>CYCHR2=0)  
97 = UV2 (<06>CYCHR1=0, <06>CYCHR2=0)  
113 = UV3 (<06>CYCHR1=0, <06>CYCHR2=0)  
125 = UV4 (<06>CYCHR1=0, <06>CYCHR2=0)  
127 = UV5 (<06>CYCHR1=0, <06>CYCHR2=0)  
06  
CYCHR1  
CYCHR2  
1
0
0
0
UV (chroma) low pass filter offset correction 1  
0 = off  
1 = on  
06  
2
UV (chroma) low pass filter offset correction 2  
0 = off  
1 = on  
I C registers for DELAY2 (DL2)  
17  
PXSKWON  
3
1
pixel skew correction (see section 2.5.)  
0 = off  
[note: delay adapted every field, see Fig. 215]  
1 = on  
[note: delay adapted every line, see Fig. 214]  
21  
2
DL2  
70  
69  
delay adjust for RGB to YUV-path (see section 2.5.)  
(0...255)*2 + 2 clocks delay to write DL2FIFO if <17>PXSKWON = 1  
(48...212) clocks delay to read DL2FIFO if <17>PXSKWON = 0  
I C registers for DELAY1 (DL1)  
10  
SECAM  
5
0
1
delay of digital YUVin (SECAM mode)  
0 = see <10>DL1ON  
1 = UV: 2 clocks, Y: 76 clocks (set <10>DL1ON = 0)  
10  
DL1ON  
4
delay of digital YUVin (set <10>SECAM = 0)  
0 = 2 clocks  
1 = 80 clocks  
Micronas  
23  
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