CCU 3000, CCU 3000-I
CCU 3001, CCU 3001-I
0210H
Bit
IM Bus 1 Control and Status Register
Reset
Read
Write
7 to 4
3
x
x
x
0
‘1’ = 1 byte received in slave reg-
ister 3 (IM bus address 4)
‘1’ = read word via IM bus
(master)
(bits 0 to 3:
‘0000’=
reset IM bus
interface)
2
1
0
0
0
0
‘1’ = 1 byte received in slave reg-
ister 2 (IM bus address 3)
‘1’ = read byte via IM bus
(master)
‘1’ = 1 byte received in slave reg-
ister 1 (IM bus address 2)
‘1’ = write word via IM bus
(master)
‘1’ = IM bus (master) busy
‘1’ = write byte via IM bus
(master)
0211H
IM Bus 1 Data Transfer Rate Register
Bit
Reset
Read
Write
7 to 6
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
5
4
3
2
1
0
transfer rate bit 5
transfer rate bit 4
transfer rate bit 3
transfer rate bit 2
transfer rate bit 1
transfer rate bit 0
0213H
IM Bus 1 Master Address Register
Bit
7
Reset
Read
Write
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
IM bus address bit 7
IM bus address bit 6
IM bus address bit 5
IM bus address bit 4
IM bus address bit 3
IM bus address bit 2
IM bus address bit 1
IM bus address bit 0
6
5
4
3
2
1
0
MICRONAS INTERMETALL
41
MICRONAS [ MICRONAS ]
