CCU 3000, CCU 3000-I
CCU 3001, CCU 3001-I
021DH
Interrupt Controller Return Register
Bit
7
Reset
Read
Write
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
6
The ‘write’ to this register is the
5
x
x
x
x
x
x
handshake for the interrupt
controller that the current
interrupt request is served.
4
3
2
1
0
021EH
Interrupt Priorities: Source 1 = Timer 2 and Source 0 = Timer 1
Bit
7
Reset
Read
Write
x x x x x x x x
Interrupt priority
value for source 1
= timer 2
values 0 to 7:
0 = interrupt
disabled
1 = lowest priority
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
6
5
0 1 0 1
off low
0
1 0 1
high
4
7 = highest priority
Interrupt priority
value for source 0
= timer 1
values 0 to 7:
0 = interrupt
disabled
1 = lowest priority
3
x x x x x x x x
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
2
1
0
7 = highest priority
0 1 0 1
0
1 0 1
021FH
Interrupt Priorities: Source 3 = IM Bus 1 Master and Source 2 = Timer 3
Bit
7
Reset
Read
Write
x x x x x x x x
Interrupt priority
value for source 3
= IM bus 1 Master
values 0 to 7:
0 = interrupt
disabled
1 = lowest priority
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
6
5
0 1 0 1
off low
0
1 0 1
high
4
7 = highest priority
Interrupt priority
value for source 2
= timer 3 (1 ms)
values 0 to 7:
0 = interrupt
disabled
1 = lowest priority
3
x x x x x x x x
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
2
1
0
7 = highest priority
0 1 0 1
0
1 0 1
44
MICRONAS INTERMETALL
MICRONAS [ MICRONAS ]
