128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Global Main-Array Protection
Global Main-Array Protection
Global main-array protection can be implemented by controlling VPP. When program-
ming or erasing main-array blocks, VPP must be equal to or greater than VPPL, min . When
VPP is below VPPLK, PROGRAM or ERASE operations are inhibited, thus providing abso-
lute protection of the main array.
Various methods exist for controlling VPP, ranging from simple logic control to off-board
voltage control. The following figure shows example VPP supply connections that can be
used to support PROGRAM or ERASE operations and main-array protection.
Figure 14: VPP Supply Connection Example
VCC
VCC
VCC
VPP
VCC
VPP
VPPH
≤10kΩ
VPPL
PROT#
• Factory programming: VPP = VPPH
• Program/erase protection: VPP ≤ VPPLK
• Program/Erase enable: PROT# = VIH
• Program/Erase protection: PROT# = VIL
VCC
VCC
VCC
VPP
VCC
VPP
VPPL
VPPL
VPPH
• Low-voltage programming
or
• Low-Voltage programming: VPP = VCC
• Program/Erase protection: None
• Factory programming
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
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