256Mb: x4, x8, x16 SDRAM
Functional Block Diagrams
Functional Block Diagrams
Figure 1: 64 Meg x 4 Functional Block Diagram
CKE
CLK
CONTROL
LOGIC
CS#
WE#
CAS#
BANK3
BANK2
BANK1
RAS#
REFRESH
COUNTER
13
MODE REGISTER
12
BANK0
ROW-
ADDRESS
LATCH
&
ROW-
ADDRESS
MUX
13
BANK0
MEMORY
ARRAY
1
1
8192
DQM
13
(8192 x 2048 x 4)
DECODER
DATA
OUTPUT
REGISTER
SENSE AMPLIFIERS
8192
4
I/O GATING
2
4
DQ[3:0]
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
BANK
CONTROL
LOGIC
A[12:0]
BA[1:0]
ADDRESS
REGISTER
15
DATA
INPUT
REGISTER
2
4
2048
(x4)
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
11
11
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
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