256Mb: x4, x8, x16 SDRAM
Functional Block Diagrams
Figure 3: 16 Meg x 16 Functional Block Diagram
CKE
CLK
CONTROL
LOGIC
CS#
WE#
BANK3
CAS#
RAS#
BANK2
BANK1
REFRESH
COUNTER
13
MODE REGISTER
12
BANK0
ROW-
ADDRESS
LATCH
&
ROW-
ADDRESS
MUX
13
BANK0
MEMORY
ARRAY
2
2
8192
DQML,
DQMH
13
(8192 x 512 x 16)
DECODER
DATA
OUTPUT
REGISTER
SENSE AMPLIFIERS
8192
16
I/O GATING
2
16
DQ[15:0]
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
BANK
CONTROL
LOGIC
A[12:0]
BA[1:0]
ADDRESS
REGISTER
15
DATA
INPUT
REGISTER
2
16
512
(x16)
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
9
9
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
10
© 1999 Micron Technology, Inc. All rights reserved.
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