256Mb: x4, x8, x16 SDRAM
Features
Table 2: Address Table
Parameter
64 Meg x 4
16 Meg x 4 x 4 banks
8K
32 Meg x 8
16 Meg x 16
4 Meg x 16 x 4 banks
8K
Configuration
Refresh count
Row addressing
Bank addressing
Column addressing
8 Meg x 8 x 4 banks
8K
8K A[12:0]
8K A[12:0]
4 BA[1:0]
8K A[12:0]
4 BA[1:0]
4 BA[1:0]
2K A[9:0], A11
1K A[9:0]
512 A[8:0]
Table 3: 256Mb SDR Part Numbering
Part Numbers
MT48LC64M4A2TG
MT48LC64M4A2P
MT48LC64M4A2FB1
MT48LC64M4A2BB1
MT48LC32M8A2TG
MT48LC32M8A2P
MT48LC32M8A2FB1
MT48LC32M8A2BB1
MT48LC16M16A2TG
MT48LC16M16A2P
MT48LC16M16A2FG
MT48LC16M16A2BG
Architecture
64 Meg x 4
64 Meg x 4
64 Meg x 4
64 Meg x 4
32 Meg x 8
32 Meg x 8
32 Meg x 8
32 Meg x 8
16 Meg x 16
16 Meg x 16
16 Meg x 16
16 Meg x 16
Package
54-pin TSOP II
54-pin TSOP II
60-ball FBGA
60-ball FBGA
54-pin TSOP II
54-pin TSOP II
60-ball FBGA
60-ball FBGA
54-pin TSOP II
54-pin TSOP II
54-ball FBGA
54-ball FBGA
1. FBGA Device Decoder: www.micron.com/decoder.
Note:
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2
© 1999 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
