64Mb: x4, x8, x16 SDRAM
SELF REFRESH Operation
Figure 49: Self Refresh Mode
T0
T1
T2
Tn + 1
To + 1
To + 2
( (
) )
( (
) )
t
CL
CLK
CKE
t
( (
) )
( (
) )
t
CK
CH
t
CKS
( (
) )
( (
) )
( (
) )
t
t
CKS
CKH
t
t
CMS
CMH
( (
) )
( (
) )
( (
) )
( (
) )
AUTO
REFRESH
AUTO
REFRESH
Command
DQM
PRECHARGE
NOP
NOP
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
Address
A10
All banks
( (
) )
( (
) )
( (
) )
( (
) )
Single bank
t
t
AH
AS
( (
) )
( (
) )
( (
) )
( (
) )
Bank(s)
BA0, BA1
DQ
High-Z
( (
) )
( (
) )
t
t
RP
XSR
Precharge all
active banks
Enter self refresh mode
Exit self refresh mode
(Restart refresh time base)
CLK stable prior to exiting
self refresh mode
Don’t Care
1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are
not required.
Note:
PDF: 09005aef80725c0b
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
79
© 1999 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
