欢迎访问ic37.com |
会员登录 免费注册
发布采购

MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第48页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第49页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第50页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第51页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第53页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第54页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第55页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第56页  
64Mb: x4, x8, x16 SDRAM  
READ Operation  
Continuous-page READ bursts can be truncated with a BURST TERMINATE command  
and fixed-length READ bursts can be truncated with a BURST TERMINATE command,  
provided that auto precharge was not activated. The BURST TERMINATE command  
should be issued x cycles before the clock edge at which the last desired data element is  
valid, where x = CL - 1. This is shown in Figure 23 (page 52) for each possible CAS la-  
tency; data element n + 3 is the last desired data element of a longer burst.  
Figure 23: Terminating a READ Burst  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
CLK  
BURST  
READ  
NOP  
NOP  
NOP  
NOP  
NOP  
Command  
Address  
DQ  
TERMINATE  
X = 1 cycle  
Bank,  
Col n  
DOUT  
DOUT  
DOUT  
DOUT  
CL = 2  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
CLK  
Command  
Address  
DQ  
BURST  
READ  
NOP  
NOP  
NOP  
NOP  
X = 2 cycles  
NOP  
NOP  
TERMINATE  
Bank,  
Col n  
DOUT  
DOUT  
DOUT  
DOUT  
CL = 3  
Transitioning data  
Don’t Care  
1. DQM is LOW.  
Note:  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
52  
© 1999 Micron Technology, Inc. All rights reserved.  
 复制成功!