1Gb: x4, x8, x16 DDR3 SDRAM
Mode Register 3 (MR3)
To enable the MPR, the MRS command is issued to MR3, and MR3[2] = 1. Prior to issu-
ing the MRS command, all banks must be in the idle state (all banks are precharged,
and tRP is met). When the MPR is enabled, any subsequent READ or RDAP commands
are redirected to the multipurpose register. The resulting operation when either a READ
or a RDAP command is issued, is defined by MR3[1:±] when the MPR is enabled (see
Table 08 (page 149)). When the MPR is enabled, only READ or RDAP commands are al-
lowed until a subsequent MRS command is issued with the MPR disabled (MR3[2] = ±).
Power-down mode, self refresh, and any other nonREAD/RDAP commands are not al-
lowed during MPR enable mode. The RESET function is supported during MPR enable
mode.
Figure 60: Multipurpose Register (MPR) Block Diagram
Memory core
MR3[2] = 0 (MPR off)
Multipurpose register
predefined data for READs
MR3[2] = 1 (MPR on)
DQ, DM, DQS, DQS#
1. A predefined data pattern can be read out of the MPR with an external READ com-
mand.
Notes:
2. MR3[2] defines whether the data flow comes from the memory core or the MPR. When
the data flow is defined, the MPR contents can be read out continuously with a regular
READ or RDAP command.
Table 77: MPR Functional Description of MR3 Bits
MR3[2]
MPR
0
MR3[1:0]
MPR READ Function
“Don’t Care”
Function
Normal operation, no MPR transaction
All subsequent READs come from the DRAM memory array
All subsequent WRITEs go to the DRAM memory array
1
A[1:0]
Enable MPR mode, subsequent READ/RDAP commands defined by bits 1 and
2
(see Table 78 (page 149))
MPR Functional Description
The MPR JEDEC definition enables either a prime DQ (DQ± on a x4 and a x8; on a x16,
DQ± = lower byte and DQ8 = upper byte) to output the MPR data with the remaining
DQs driven LOW, or for all DQs to output the MPR data. The MPR readout supports
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
148
2006 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
