1Gb: x4, x8, x16 DDR3 SDRAM
Command and Address Setup, Hold, and Derating
Table 61: Derating Values for tIS/tIH – AC135/DC100-Based
ΔtIS, ΔtIH Derating (ps) – AC/DC-Based
AC135 Threshold: VIH(AC) = VREF(DC) + 135mV, VIL(AC) = VREF(DC) - 135mV
CMD/
ADDR
Slew Rate
V/ns
CK, CK# Differential Slew Rate
4.0 V/ns
3.0 V/ns
2.0 V/ns
1.8 V/ns
1.6 V/ns
1.4 V/ns
1.2 V/ns
1.0 V/ns
ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIH ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH
2.0
1.5
1.0
68
45
0
50
34
0
68
45
0
50
34
0
68
45
50
34
76
53
8
58
42
8
84
61
16
66
50
16
92
69
24
74
58
24
100
77
84
68
34
108 100
85
40
84
50
32
0
0
0.9
0.8
0.7
0.6
0.5
0.4
2
3
–4
2
3
–4
10
11
14
17
13
6
4
18
19
22
25
21
14
12
6
26
27
30
33
29
22
20
14
8
34
35
38
41
37
30
30
24
18
8
42
43
46
49
45
38
46
40
2
3
–4
–10
–16
–26
–40
–60
–10
–16
–26
–40
–60
–10
–16
–26
–40
–60
–2
6
6
6
–8
0
34
9
9
9
–18
–32
–52
–10
–24
–44
–2
24
5
5
5
–16
–36
–6
–26
10
–3
–3
–3
–10
Table 62: Derating Values for tIS/tIH – AC125/DC100-Based
ΔtIS, ΔtIH Derating (ps) – AC/DC-Based
AC125 Threshold: VIH(AC) = VREF(DC) + 125mV, VIL(AC) = VREF(DC) - 125mV
CMD/
ADDR
Slew Rate
V/ns
CK, CK# Differential Slew Rate
4.0 V/ns
3.0 V/ns
2.0 V/ns
1.8 V/ns
1.6 V/ns
1.4 V/ns
1.2 V/ns
1.0 V/ns
ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH ΔtIH ΔtIH ΔtIS ΔtIH ΔtIS ΔtIH
2.0
1.5
1.0
63
42
0
50
34
0
63
42
0
50
34
0
63
42
50
34
71
50
8
58
42
8
79
58
16
66
50
16
87
66
24
74
58
24
95
74
32
84
68
34
103 100
82
40
84
50
0
0
0.9
0.8
0.7
0.6
0.5
0.4
4
–4
4
–4
12
14
19
24
23
21
4
20
22
27
32
31
29
12
6
28
30
35
40
39
37
20
14
8
36
38
43
48
47
45
30
24
18
8
44
45
51
56
55
53
46
40
4
–4
6
–10
–16
–26
–40
–60
6
–10
–16
–26
–40
–60
6
–10
–16
–26
–40
–60
–2
11
16
15
13
11
16
15
13
11
16
15
13
–8
0
34
–18
–32
–52
–10
–24
–44
–2
24
–16
–36
–6
–26
10
–10
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1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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