256Mb, 3V Multiple I/O Serial Flash Memory
ERASE Operations
Figure 40: SUBSECTOR and SECTOR ERASE Timing
Extended
0
7
8
4
C
x
C
LSB
A[MIN]
DQ0
Command
MSB
A[MAX]
A[MAX]
Dual
0
3
C
x
C
LSB
A[MIN]
DQ0[1:0]
Command
MSB
Quad
0
1
2
C
x
C
LSB
A[MIN]
DQ0[3:0]
Command
MSB
A[MAX]
1. For extended-SPI protocol, Cx = 7 + (A[MAX] + 1); For dual-SPI protocol, Cx = 3 + (A[MAX]
+ 1)/2; For quad-SPI protocol, Cx = 1 + (A[MAX] + 1)/4.
Notes:
2. S# not shown.
Figure 41: BULK ERASE Timing
Extended
0
7
C
LSB
DQ0
Command
0
MSB
MSB
Dual
3
C
LSB
DQ[1:0]
Command
0
Quad
1
C
LSB
DQ[3:0]
Command
MSB
1. S# not shown.
Note:
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.
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