256Mb, 3V Multiple I/O Serial Flash Memory
SUSPEND/RESUME Operations
Table 31: SUSPEND/RESUME Operations (Continued)
Operation Name
Description/Conditions
PROGRAM RESUME (7Ah)
ERASE RESUME (7Ah)
The status register write in progress bit is set to 1 and the flag status register program
erase controller bit is set to 0. The command is ignored if the device is not in a suspen-
ded state.
When the operation is in progress, the program or erase controller bit of the flag status
register is set to 0. The flag status register can be polled for the operation status. When
the operation completes, that bit is cleared to 1.
1. See the Operations Allowed/Disallowed During Device States table.
Note:
Figure 42: PROGRAM/ERASE SUSPEND and RESUME Timing
Extended
0
7
C
LSB
DQ0
Command
0
MSB
MSB
Dual
3
C
LSB
DQ[1:0]
Command
0
Quad
1
C
LSB
DQ[3:0]
Command
MSB
1. S# not shown.
Note:
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
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