256Mb: 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 22: CE#-Controlled Program AC Timing (8-Bit Mode)
3rd Cycle 4th Cycle
Data Polling
PA
t
WC
WS
AAAh
t
PA
A[MAX:0]/A-1
WE#
t
AS
AH
t
WH
t
t
GHEL
OE#
CE#
t
t
t
CP
CPH
PD
t
WHWH1
DS
DQ[7:0]
A0h
DQ7#
D
OUT
t
DH
1. Only the third and fourth cycles of the PROGRAM command are represented. The PRO-
GRAM command is followed by checking of the status register data polling bit.
Notes:
2. PA is the address of the memory location to be programmed. PD is the data to be pro-
grammed.
3. DQ7 is the complement of the data bit being programmed to DQ7. (See Data Polling Bit
[DQ7].)
4. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84bd3b68
m29w_256mb.pdf - Rev. C 7/13 EN
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