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M29W256GH70N3E 参数 Datasheet PDF下载

M29W256GH70N3E图片预览
型号: M29W256GH70N3E
PDF下载: 下载PDF文件 查看货源
内容描述: [Parallel NOR Flash Embedded Memory]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 76 页 / 992 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb: 3V Embedded Parallel NOR Flash  
Registers  
Registers  
Status Register  
Table 5: Status Register Bit Definitions  
Note 1 applies to entire table  
Bit  
Name  
Settings  
Description  
Notes  
DQ7 Data polling 0 or 1, depending on  
Monitors whether the program/erase controller has successful- 2, 3, 4  
ly completed its operation, or has responded to an ERASE SUS-  
PEND operation.  
bit  
operations  
DQ6 Toggle bit  
Toggles: 0 to 1; 1 to 0;  
and so on  
Monitors whether the program/erase controller has successful- 3, 4, 5  
ly completed its operations, or has responded to an ERASE  
SUSPEND operation. During a PROGRAM/ERASE operation,  
DQ6 toggles from 0 to 1, 1 to 0, and so on, with each succes-  
sive READ operation from any address.  
DQ5 Error bit  
0 = Success  
1 = Failure  
Identifies errors detected by the program/erase controller. DQ5  
is set to 1 when a PROGRAM, BLOCK ERASE, or CHIP ERASE op-  
eration fails to write the correct data to the memory.  
4, 6  
DQ3 Erase timer 0 = Erase not in progress Identifies the start of program/erase controller operation dur-  
4
bit  
1 = Erase in progress  
ing a BLOCK ERASE command. Before the program/erase con-  
troller starts, this bit set to 0, and additional blocks to be  
erased can be written to the command interface.  
DQ2 Alternative Toggles: 0 to 1; 1 to 0;  
Monitors the program/erase controller during ERASE opera-  
tions. During CHIP ERASE, BLOCK ERASE, and ERASE SUSPEND  
operations, DQ2 toggles from 0 to 1, 1 to 0, and so on, with  
each successive READ operation from addresses within the  
blocks being erased.  
3, 4  
toggle bit  
and so on  
DQ1 Buffered  
program  
1 = Abort  
Indicates a BUFFER PROGRAM operation abort. The BUFFERED  
PROGRAM ABORT and RESET command must be issued to re-  
turn the device to read mode (see WRITE TO BUFFER PRO-  
GRAM command).  
abort bit  
1. The status register can be read during PROGRAM, ERASE, or ERASE SUSPEND operations;  
the READ operation outputs data on DQ[7:0].  
Notes:  
2. For a PROGRAM operation in progress, DQ7 outputs the complement of the bit being  
programmed. For a READ operation from the address previously programmed success-  
fully, DQ7 outputs existing DQ7 data. For a READ operation from addresses with blocks  
to be erased while an ERASE SUSPEND operation is in progress, DQ7 outputs 0; upon  
successful completion of the ERASE SUSPEND operation, DQ7 outputs 1. For an ERASE  
operation in progress, DQ7 outputs 0; upon either operation's successful completion,  
DQ7 outputs 1.  
3. After successful completion of a PROGRAM or ERASE operation, the device returns to  
read mode.  
4. During erase suspend mode, READ operations to addresses within blocks not being  
erased output memory array data as if in read mode. A protected block is treated the  
same as a block not being erased. See the Toggle Flowchart for more information.  
5. During erase suspend mode, DQ6 toggles when addressing a cell within a block being  
erased. The toggling stops when the program/erase controller has suspended the ERASE  
operation. See the Toggle Flowchart for more information.  
PDF: 09005aef84bd3b68  
m29w_256mb.pdf - Rev. C 7/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
14  
© 2013 Micron Technology, Inc. All rights reserved.  
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