128Mb 3V Embedded Parallel NOR Flash
Program Operations
Figure 8: WRITE TO BUFFER PROGRAM Flowchart
Start
WRITE TO BUFFER
command,
WRITE TO BUFFER
confirm, block address
block address
Read status register
(DQ1, DQ5, DQ7) at
last loaded address
1
Write n,
block address
First three cycles of the
WRITE TO BUFFER
PROGRAM command
Write buffer data,
start address
Yes
DQ7 = Data
No
X = n
No
No
DQ1 = 1
DQ5 = 1
Yes
Yes
X = 0
No
Yes
Yes
Check status register
(DQ5, DQ7) at
last loaded address
Abort
WRITE TO BUFFER
Write to a different
block address
Yes
No
4
DQ7 = Data
WRITE TO BUFFER
and PROGRAM
3
Write next data,
program address pair
2
aborted
No
Fail or
abort
End
5
X = X - 1
1. n + 1 is the number of addresses to be programmed.
Notes:
2. The BUFFERED PROGRAM ABORT and RESET command must be issued to return the de-
vice to read mode.
3. When the block address is specified, any address in the selected block address space is
acceptable. However, when loading program buffer address with data, all addresses
must fall within the selected program buffer page.
4. DQ7 must be checked because DQ5 and DQ7 may change simultaneously.
5. If this flowchart location is reached because DQ5 = 1, then the WRITE TO BUFFER PRO-
GRAM command failed. If this flowchart location is reached because DQ1 = 1, then the
WRITE TO BUFFER PROGRAM command aborted. In both cases, the appropriate RESET
command must be issued to return the device to read mode: A RESET command if the
operation failed; a WRITE TO BUFFER PROGRAM ABORT AND RESET command if the op-
eration aborted.
6. See the Standard Command Definitions – Address-Data Cycles, 8-Bit and 16-Bit table for
details about the WRITE TO BUFFER PROGRAM command sequence.
PDF: 09005aef84daa141
m29w_128mb.pdf - Rev. A 7/13 EN
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